ADC09SJ1300-Q1 is an automotive single-channel, 9-bit, 1.3GSPS analog-to-digital converter with JESD204C interface
The ADC09SJ1300-Q1 is an AD841SQ family of quad, dual and single, 9-bit, 1.3 GSPS analog-to-digital converters (ADCs). Low power consumption, high sampling rate, and 9-bit resolution make the ADC09SJ1300-Q1 ideal for light detection and ranging (LiDAR) systems. The ADC09SJ1300-Q1 is qualified for automotive applications.
The 6 GHz full power input bandwidth (-3 dB) provides a flat frequency response for frequency modulated continuous wave (FMCW) lidar systems and a narrow impulse response for pulse-based systems. The full power input bandwidth also supports direct RF sampling up to 4 GHz.
characteristic:
AEC-Q100 qualified for automotive applications:
○ Temperature Class 1: -40°C to +125°C, T A
●ADC core:
○ Resolution: 9 bits
○ Maximum sampling rate: 1.3 GSPS
○ Non-interleaved architecture
○ Internal jitter reduces higher harmonics
●Performance Specifications (–1 dBFS):
○ Signal-to-noise ratio (100 MHz): 53.5 dBFS
○ENOB (100 MHz): 8.5 bits
○SFDR (100 MHz): 64 dBc
○ Noise Floor (–20 dBFS): –143 dBFS
●Full scale input voltage: 800 mV PP-DIFF
●Full power input bandwidth: 6 GHz
●JESD204C serial data interface:
○ Supports 2 to 8 (quad/dual channel) or 1 to 4 (single channel) total SerDes channels
○ Maximum baud rate: 17.16 Gbps
○64B/66B and 8B/10B encoding modes
○ Subclass 1 support for deterministic latency
○ Compatible with JESD204B receiver
● Optional internal sample clock generation
○ Internal PLL and VCO (7.2–8.2 GHz)
SYSREF windowing simplifies synchronization
● Four clock outputs simplify system clocking
○ Reference clock for FPGA or adjacent ADC
○ Reference clock for SerDes transceiver
● Timestamp input and output of pulse system
●Power consumption (1 GSPS):
○ Four channels: 450 mW/channel
○ Dual channel: 625 mW/channel
○Single channel: 940 mW
●Power supply: 1.1V, 1.9V